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{
    "url": "https://mailman.amsat.org/hyperkitty/api/list/[email protected]/email/N2MTLNMXZ7CXS4BERHPB6RBNB63N4B4R/?format=api",
    "mailinglist": "https://mailman.amsat.org/hyperkitty/api/list/[email protected]/?format=api",
    "message_id": "[email protected]",
    "message_id_hash": "N2MTLNMXZ7CXS4BERHPB6RBNB63N4B4R",
    "thread": "https://mailman.amsat.org/hyperkitty/api/list/[email protected]/thread/NHX6X5EKQIQSZSS634TXEOLCBVH3Q3HB/?format=api",
    "sender": {
        "address": "bill (a) hsmicrowave.com",
        "mailman_id": "d7ecbf0c1df148f289f27dd7a8c37974",
        "emails": "https://mailman.amsat.org/hyperkitty/api/sender/d7ecbf0c1df148f289f27dd7a8c37974/emails/?format=api"
    },
    "sender_name": "Bill Ress",
    "subject": "[eagle]  Eagle 10 MHz Clock",
    "date": "2007-04-10T02:55:31Z",
    "parent": "https://mailman.amsat.org/hyperkitty/api/list/[email protected]/email/NHX6X5EKQIQSZSS634TXEOLCBVH3Q3HB/?format=api",
    "children": [
        "https://mailman.amsat.org/hyperkitty/api/list/[email protected]/email/WHEP3V2KREMZ2UK3JYAZORDGXB22BY5I/?format=api",
        "https://mailman.amsat.org/hyperkitty/api/list/[email protected]/email/DS2O3NMPVMDRTXOFYC7KQKGDDP5NGW56/?format=api",
        "https://mailman.amsat.org/hyperkitty/api/list/[email protected]/email/G5WJ5M4VHARJ6LEFQSG4ZWZGUPHXLJ4A/?format=api"
    ],
    "votes": {
        "likes": 0,
        "dislikes": 0,
        "status": "neutral"
    },
    "content": "Some very good dialog has been taking place, lead by Juan Rivera as he \nheads up the prototype U Receiver build and test project.\n\nSeveral very important questions have been raised but I'd like to \naddress just one with this post.\n\nI've volunteered to design and build the S2 Receiver and the C \nTransmitter and support microwave component efforts on the phased array \nfor each. I am finishing efforts on a \"prototype\" single channel \n(assuming there might be several) S2 downconverter.\n\nI fully recognize than \"many\" system design parameters have not yet been \ndefined but I'm trying to get that \"definition\" effort moving along.\n\nThis is the first one I'd like to address.\n\nIn the coarse of designing the LO for the \"prototype\" S2 downconverter I \nhave not been too concerned with use of the 10 MHz satellite clock. But \nI think it's time for \"system\" project guidelines to be developed for \nthis issue since it can affect the design of all LO's. I have looked for \nguidance on the subject in Eaglepedia and have come up short. Point me \nin the right direction if it's there (and I just couldn't find it).\n\nI hope I'm not rehashing old discussions (I've only been on the team \nsince last October) but here are my questions:\n\n1) What is the reason for requiring all LO's to be locked to a 10 MHz \nsatellite system clock or are they?\n\n2) Have the performance specifications for the 10 MHz clock been \ndeveloped and what are they (in particular phase noise, frequency \nstability, susceptibility to digital hash, and power level available to \neach using subsystem - to name a few)?\n\nMy apologies for sending to the entire Eagle list but I'm not sure who \nhas the responsibility for the clock.\n\nProbably more questions to follow!!!\n\nRegards...Bill - N6GHz\n\n\n\n",
    "attachments": []
}