The big current spike is during start up and the static current afterwards is low enough so that you can manage power dissiation. I wouldn't use DCMs for the reciver as it must deal with multiple narrow-bandwidth signals. The downlink will be about 2 Mbaud BPSK so phase noise isn't a big issue in generating low-frequency signals to be upconverted.
73
John KD6OZH
----- Original Message ----- From: "Matt Ettus" matt@ettus.com To: "AMSAT Eagle" Eagle@amsat.org Sent: Sunday, March 25, 2007 21:40 UTC Subject: [eagle] Re: Eagle Microwave Antenna Arrays-- mechanical concepts
John B. Stephensen wrote:
The amount of power required by the FPGA depends on the number of logic elements used and the speed of operation. Anything that isn't clocked in the FPGA consumes almost no power so the thermal dissipation is controlled by the logic designer.
This is not true anymore. Small geometry devices (< 90nm) can consume a lot of static power.
DCMs require a lot less power than an external DDS and an FPGA would be a good place to put other logic.
DCMs have horrible phase noise. You wouldn't want to use them for generating clocks for ADCs, DACs, LOs, or PLLs.
Matt _______________________________________________ Via the Eagle mailing list courtesy of AMSAT-NA Eagle@amsat.org http://amsat.org/mailman/listinfo/eagle