On Sat, 2007-03-24 at 00:28, John B. Stephensen wrote:
The only disadvantage of the NCOs is the power required. Analog Devices makes a quad 500 Msps DDS but it consumes up to 80 mW per channel and the upconversion mixers will consume additional power. The MA/COM phase shifters consume less than 50 mW per channel.
80 mW doesn't sound too bad for a signal chain with a 1W power amplifier.
However, NCOs aren't needed for the transmitter. The IF inputs could be fixed-frequency square waves with adjustable time delays. Harmonics could be cleaned up by low-pass filters preceeding the upconversion mixers. Spartan-3 FPGAs have up to 8 digital clock managers with 256-step time delays in 15-60 ps increments. A 15 ns maximum delay would allow a 360-degree phase shift at frequencies as low as 67 MHz and the FPGA can be clocked at 200 MHz. Virtex FPGAs run at 500 MHz and have more DCMs.
But how much power do the FPGAs require? Of course, it depends on what is programmed into them and the clock rate. But I know that in some applications they require a heat sink, so it can be quite a lot (several watts) of power.
Alan