I did not intend to suggest using an FPGA over the DSP processors you suggested, but only that development might not be as difficult as we expect. That being said, without the use of Xilinx IP (of which most of the source code is hidden) the above is not true. The IP blocks take a lot of the effort that goes into configuring DSP slices (hard MAC blocks) and associated pipelining. It would be a significant amount of effort to recreate that. 

Do you have any idea of the power they would use?

I'm working on a fairly large design at work with a Zynq, and last I checked I was at around 4.3W. As far as I've seen, that's pretty typical for our applications. I've never worked on a DSP system though. Datasheet values put one of the lower end Zynqs (ZC7Z2010) at almost 200 mA for all sources, which would end up being a max of 355 mW quiescent (assuming all supplies are 1.8V, where most of them are below that). With an application running, I'm not sure you could maintain the <1W requirement.

Are you talking about a PA module as something that can be used on the
satellite, or just something as a temporary solution to plug into Jim's
board?  And as I mentioned before, power is a big issue.  I don't know
much about these things, though.

Both. I'm saying that I can get something prototyped up for Jim's board which we can take power measurements on quickly that will also work for the flight model. If those are deemed inadequate, we can continue prototyping the discrete transistor option. I think that after looking at a lot of the options available on the Tx side and the desired voltage, efficiency is not great with either the discrete transistors or integrated amplifiers. The transistor we're using now is one of the better options, and even its efficiency is pretty bad (40-50%) considering the output power we desire. The option on the IC side sits at little less than 61% efficiency. In all, I'd say both options are comparable in terms of efficiency.

Thanks,

Cameron


-------------------------------------------------

Cameron Castillo

KJ7ILB

P: (503) 752-8877

--------------------------------------------------



On Sun, Jan 12, 2025 at 7:32 AM Corey Minyard <corey@minyard.net> wrote:
On Sat, Jan 11, 2025 at 8:15 PM Corey Minyard <corey@minyard.net> wrote:
>
> On Sun, Jan 12, 2025 at 01:13:36AM +0000, Cameron Castillo via pacsat-dev wrote:
> > Hi Bill,
> >
> > Interesting presentation! A couple notes:
> >
> > On the FPGA design for the SDR, a significant amount of the work can be
> > done via Xilinx IP. I think the team has the idea that most of the DSP and
> > hardware would have to be built from scratch in verilog. For almost any
> > design today, many people use the block diagram editor from Xilinx instead
> > of writing their own verilog. Not only are these guaranteed to work but all
> > the driver code is also available in their software platform (Vitis). I've
> > looked into some of the DSP blocks they have available and the list is
> > fairly comprehensive (IIR/FIR filters, FFTs, Freq. Synthesizer to name a
> > few off the top of my head).
>
> Yes, I'm aware of this.  From what I can tell, the licensing is not open
> source on these.  If that's so we can't use them on our platform.  But
> maybe I'm wrong.

Also, for the record, you have all those same building blocks with a DSP.
Functions already exist to do pretty much everything you need.  So from
the point of view of building blocks available, I'd guess they are about the
same.  I think they are open source, but I need to double-check that.

I am biased towards a DSP because that's what I've used in the past, and
I recognise that.  But it really all comes down to:

1) Surviving the rigors of space.

2) Power usage

3) Open source

4) Accessibility - we want to build a platform that is easy for others to use.

I don't know FPGAs very well; I have done a little bit of VHDL and programmed
PALs (you probably don't even know what one of those is...) so for the analysis
I'm going to have to lean on others.

-corey

>
> Second, I am planning on custom modulation, so those would have to be
> written in VHDL or Verilog.  Not a show-stopper, though.
>
> >
> > One of the other benefits is that many of Xilinx's products have hard
> > integrated processors or have the ability to integrate soft processors (See
> > Zynq and MicroBlaze respectively). The nice thing about these is that they
> > support Linux development and bare-metal/RTOS configuration. We might even
> > be able to remove the TMS570 and replace it with one of the multi-core
> > devices. Perhaps we could have a system where Direwolf and the other
> > processing functions are run on the same chip as the DSP. The downside to
> > this is that I'm not sure how parallelable that would be (i.e. could we
> > maintain four Rx channels).
>
> If you are going to use something like a Zynq processor, why do you even
> need a DSP or an FPGA for this application? ;-)  You could even get
> those fancy Zynq processors that have built-in RF subsystems.  They just
> cost $2000 and need gobs of power.  I don't know much about the
> MicroBlaze, how powerful it is or whatnot.
>
> The big problem with these things is power.  Zynq or Versal is right
> out.  I'm looking to keep the entire power budget for everything outside
> of the PA to <1W.  I think I can be successful if I play some tricks.
> I have no idea how much a MicroBlaze on an FPGA would use.
>
> Also, there's a lot of functional safety things tied into the TMS570
> processors.  Things like lockstep processing, parity/ECC on everything,
> extended temperature, etc.  The MicroBlaze can do lockstep, it appears,
> meaning that it can't be superscalar and it will be slow.  I guess it
> says it's Harvard architecture.  I don't know how it would compare to a
> Cortex-R5F.
>
> >
> > I do a lot of work with Xilinx products and FPGAs at work. It's mostly for
> > video functions, but I've found it pretty easy to understand the
> > fundamentals of Vivado/Vitis in only a few months. With integrated
> > peripherals like AXI and the IP blocks, it probably wouldn't take as long
> > as everyone is thinking. I hardly ever touch verilog at work anymore...
>
> I'm not against using an FPGA, but it would take some research.  Do you
> have any idea of the power they would use?
>
> >
> > As far as the amplifier project is coming, I'm back in the lab at work and
> > want to get some more prototyping done with our actual amplifier. Does
> > anyone on the team have extra stock of the transistor we're using for the
> > Tx amplifier (ATF05MS004NT1)? I'd also like to get an inductor kit like this
> > one
> > <https://www.amazon.com/First-Inductor-Assorted-1nH-270nH-42Valuesx50pcs/dp/B074QM4HNP>
> > as
> > the one I have at work is all 0201s and I can't reliably solder it...
>
> A book of inductors :-).
>
> >
> > On that note, I'm happy to keep prototyping it if the team wants to go in
> > that direction, but I think it'd be faster to go with a premade power amp.
> > I've already created a schematic for a PA as a backup to the work I'm doing
> > now. If we want something for Jim's test board, I could probably get
> > something to at least prototype with a lot sooner even if we think we could
> > do better with the discrete option. Just a suggestion.
>
> Are you talking about a PA module as something that can be used on the
> satellite, or just something as a temporary solution to plug into Jim's
> board?  And as I mentioned before, power is a big issue.  I don't know
> much about these things, though.
>
> Thanks,
>
> -corey
>
> >
> > Thanks,
> >
> > Cameron Castillo
> >
> >
> > -------------------------------------------------
> >
> > Cameron Castillo
> >
> > KJ7ILB
> >
> > *P*: (503) 752-8877
> >
> > --------------------------------------------------
> >
> >
> > On Fri, Jan 10, 2025 at 8:47 AM Bill Reed <bill@brconnect.com> wrote:
> >
> > > This is a better URL...
> > >
> > > https://github.com/AMSAT-NA/PacSatDocs/blob/main/SDR/MinyardSDR_1-9-2024.webm
> > >
> > > -------- Forwarded Message --------
> > > Subject: Last nights recording
> > > Date: Fri, 10 Jan 2025 09:31:07 -0600
> > > From: Bill Reed <bill@brconnect.com> <bill@brconnect.com>
> > > To: Cameron Castillo <camstillo2000@gmail.com> <camstillo2000@gmail.com>
> > >
> > > We discussed 2 things last night.
> > >
> > > 1: Start of SDR development to replace AX5043.  Exciting stuff!
> > >
> > > https://github.com/AMSAT-NA/PacSatDocs/SDR/MinyardSDR_1-9-2024
> > >
> > > 2: Discussion of 2025 budgets that haven't been approved yet. More to
> > > come....no video.
> > >
> > > I would like to discuss your project with you at some point.  Can it be
> > > prototyped on the new launchpad that Jim is working on?
> > >
> > > Bill
> > >
> > >
>
> >
> > -----------------------------------------------------------
> >
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