December 2023 - pacsat-dev - mailman.amsat.org

Re: Progress
by Jim McCullers 29 Dec '23

29 Dec '23

Congrats Bob. Good progress. I'm back in Birmingham. Attached is the Blinky source code which includes the last HCG I did for the board. I'm certain that many changes will be required but it's a start. Not certain if Blinky, at least at the current level, is anything we want on the github repository. Discussion item for next week's meeting. 73, Jim McCullers WA4CWI All, I have worked on the board a few hours over the past few days. I got the JTAG interface put together and set this up for testing with the PC and a XDS110. When I connected them together and powered things up I initially saw the LEDs on the PCB come on which is what I expect. Unfortunately when I started trying to communicate with using the JTAG I so the LEDs go off and immediatly I checked the 3.3V supply and found it was bouncing up to about 4 volts. Not good. So I powered down and after some thought I decided the 3.3 voltage regulator was not stable enough to support out board. It's working in a feed back mode trying to hold the 3.3V while adjusting Pulse Width Modulation of the LC circuit. I tested the board with an external 3.3V supply and noticed the current draw had increased to about 240 mA. Concerning. I have removed the MAX regulator and put a LDO fixed 3.3V regulator on hanging in the air. #.3V supply now seems solid. I got everything reconnected to JTAG and started again trying to test. When I tried Test Connection I was seeing a message about missing a file which I later realized was the HalCoGen file defining the board info. I then tried the one from the PAcSat project that I had but this was not working either. So I used the setup system to create a basic interface with a 4 wire JTAG. The I select Test Connection and this time it seems to be working. Still more work needed to learn what it is telling be but the two successes at the bottom of the listing below are encouraging. In this mode the supply current is down to 190 mA feeding into the 5V supply which feeds everything on the board. May be believable. Now time to create a proper HalCoGen file. Bob N5BRG [Start: Texas Instruments XDS110 USB Debug Probe] Execute the command: %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity [Result] -----[Print the board config pathname(s)]------------------------------------ /home/bob/.ti/ccs1250/0/0/BrdDat/testBoard.dat -----[Print the reset-command software log-file]----------------------------- This utility has selected a 100/110/510 class product. This utility will load the adapter 'libjioxds110.so'. The library build date was 'Sep 6 2023'. The library build time was '09:54:42'. The library package version is '9.13.0.00201'. The library component version is '35.35.0.0'. The controller does not use a programmable FPGA. The controller has a version number of '5' (0x00000005). The controller has an insertion length of '0' (0x00000000). This utility will attempt to reset the controller. This utility has successfully reset the controller. Note: This is a key indicator -----[Print the reset-command hardware log-file]----------------------------- The scan-path will be reset by toggling the JTAG TRST signal. The controller is the XDS110 with USB interface. The link from controller to target is direct (without cable). The software is configured for XDS110 features. The controller cannot monitor the value on the EMU[0] pin. Note: We are not using some of these signals so this is OK. Bob The controller cannot monitor the value on the EMU[1] pin. The controller cannot control the timing on output pins. The controller cannot control the timing on input pins. The scan-path link-delay has been set to exactly '0' (0x0000). -----[Perform the Integrity scan-test on the JTAG IR]------------------------ This test will use blocks of 64 32-bit words. This test will be applied just once. Do a test using 0xFFFFFFFF. Scan tests: 1, skipped: 0, failed: 0 Do a test using 0x00000000. Scan tests: 2, skipped: 0, failed: 0 Do a test using 0xFE03E0E2. Scan tests: 3, skipped: 0, failed: 0 Do a test using 0x01FC1F1D. Scan tests: 4, skipped: 0, failed: 0 Do a test using 0x5533CCAA. Scan tests: 5, skipped: 0, failed: 0 Do a test using 0xAACC3355. Scan tests: 6, skipped: 0, failed: 0 All of the values were scanned correctly. Note: Good news The JTAG IR Integrity scan-test has succeeded. -----[Perform the Integrity scan-test on the JTAG DR]------------------------ This test will use blocks of 64 32-bit words. This test will be applied just once. Do a test using 0xFFFFFFFF. Scan tests: 1, skipped: 0, failed: 0 Do a test using 0x00000000. Scan tests: 2, skipped: 0, failed: 0 Do a test using 0xFE03E0E2. Scan tests: 3, skipped: 0, failed: 0 Do a test using 0x01FC1F1D. Scan tests: 4, skipped: 0, failed: 0 Do a test using 0x5533CCAA. Scan tests: 5, skipped: 0, failed: 0 Do a test using 0xAACC3355. Scan tests: 6, skipped: 0, failed: 0 All of the values were scanned correctly. Note: Good news The JTAG DR Integrity scan-test has succeeded. -----[An error has occurred and this utility has aborted]-------------------- This error is generated by TI's USCIF driver or utilities. The value is '-382' (0xfffffe82). The title is 'SC_ERR_LIST_SUBPATH_DELETE'. The explanation is: An error occurred when deleting a sub-path from the sub-path select list. The sub-path may already be off the list. Thus it cannot be deleted from that list. [End: Texas Instruments XDS110 USB Debug Probe] [Start: Texas Instruments XDS110 USB Debug Probe_0] Execute the command: %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity [Result] -----[Print the board config pathname(s)]------------------------------------ /home/bob/.ti/ccs1250/0/0/BrdDat/testBoard.dat -----[Print the reset-command software log-file]----------------------------- This utility has selected a 100/110/510 class product. This utility will load the adapter 'libjioxds110.so'. The library build date was 'Sep 6 2023'. The library build time was '09:54:42'. The library package version is '9.13.0.00201'. The library component version is '35.35.0.0'. The controller does not use a programmable FPGA. The controller has a version number of '5' (0x00000005). The controller has an insertion length of '0' (0x00000000). This utility will attempt to reset the controller. This utility has successfully reset the controller. -----[Print the reset-command hardware log-file]----------------------------- The scan-path will be reset by toggling the JTAG TRST signal. The controller is the XDS110 with USB interface. The link from controller to target is direct (without cable). The software is configured for XDS110 features. The controller cannot monitor the value on the EMU[0] pin. The controller cannot monitor the value on the EMU[1] pin. The controller cannot control the timing on output pins. The controller cannot control the timing on input pins. The scan-path link-delay has been set to exactly '0' (0x0000). -----[Perform the Integrity scan-test on the JTAG IR]------------------------ This test will use blocks of 64 32-bit words. This test will be applied just once. Do a test using 0xFFFFFFFF. Scan tests: 1, skipped: 0, failed: 0 Do a test using 0x00000000. Scan tests: 2, skipped: 0, failed: 0 Do a test using 0xFE03E0E2. Scan tests: 3, skipped: 0, failed: 0 Do a test using 0x01FC1F1D. Scan tests: 4, skipped: 0, failed: 0 Do a test using 0x5533CCAA. Scan tests: 5, skipped: 0, failed: 0 Do a test using 0xAACC3355. Scan tests: 6, skipped: 0, failed: 0 All of the values were scanned correctly. The JTAG IR Integrity scan-test has succeeded. -----[Perform the Integrity scan-test on the JTAG DR]------------------------ This test will use blocks of 64 32-bit words. This test will be applied just once. Do a test using 0xFFFFFFFF. Scan tests: 1, skipped: 0, failed: 0 Do a test using 0x00000000. Scan tests: 2, skipped: 0, failed: 0 Do a test using 0xFE03E0E2. Scan tests: 3, skipped: 0, failed: 0 Do a test using 0x01FC1F1D. Scan tests: 4, skipped: 0, failed: 0 Do a test using 0x5533CCAA. Scan tests: 5, skipped: 0, failed: 0 Do a test using 0xAACC3355. Scan tests: 6, skipped: 0, failed: 0 All of the values were scanned correctly. The JTAG DR Integrity scan-test has succeeded. [End: Texas Instruments XDS110 USB Debug Probe_0] ----------------------------------------------------------- pacsat-dev mailing list -- pacsat-dev(a)amsat.org View archives of this mailing list at https://mailman.amsat.org/hyperkitty/list/[email protected] To unsubscribe send an email to pacsat-dev-leave(a)amsat.org Manage all of your AMSAT-NA mailing list preferences at https://mailman.amsat.org

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Pacsat dev mtg 12/28/2023
by Bill 28 Dec '23

28 Dec '23

Pacsat dev mtg 12/28/2023 Thu, Dec 28, 2023 7:00 PM - 9:00 PM (CST) Please join my meeting from your computer, tablet or smartphone. https://meet.goto.com/952684413 You can also dial in using your phone. (For supported devices, tap a one-touch number below to join instantly.) United States: +1 (312) 757-3121 - One-touch: tel:+13127573121,,952684413# Access Code: 952-684-413 Join from a video-conferencing room or system. Dial in or type: 67.217.95.2 or inroomlink.goto.com Meeting ID: 952 684 413 Or dial directly: 952684413(a)67.217.95.2 or 67.217.95.2##952684413 Get the app now and be ready when your first meeting starts: https://meet.goto.com/install

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Re: Progress
by Burns Fisher (AMSAT) 26 Dec '23

26 Dec '23

Looking good. FWIW, when I load a processor on the RT-IHU, the current goes up by 50-100ma (at a bit over 5 volts). As soon as the program is loaded and starts, the current drops again. 73, Burns Fisher, WB1FJ *AMSAT(R) Engineering -- Flight Software* On Tue, Dec 26, 2023 at 9:02 PM Bob Stricklin via pacsat-dev < pacsat-dev(a)amsat.org> wrote: > All, > > I have worked on the board a few hours over the past few days. > > I got the JTAG interface put together and set this up for testing with the > PC and a XDS110. When I connected them together and powered things up I > initially saw the LEDs on the PCB come on which is what I expect. > Unfortunately when I started trying to communicate with using the JTAG I so > the LEDs go off and immediatly I checked the 3.3V supply and found it was > bouncing up to about 4 volts. Not good. So I powered down and after some > thought I decided the 3.3 voltage regulator was not stable enough to > support out board. It's working in a feed back mode trying to hold the 3.3V > while adjusting Pulse Width Modulation of the LC circuit. > > I tested the board with an external 3.3V supply and noticed the current > draw had increased to about 240 mA. Concerning. > > I have removed the MAX regulator and put a LDO fixed 3.3V regulator on > hanging in the air. #.3V supply now seems solid. > > I got everything reconnected to JTAG and started again trying to test. > When I tried Test Connection I was seeing a message about missing a file > which I later realized was the HalCoGen file defining the board info. I > then tried the one from the PAcSat project that I had but this was not > working either. So I used the setup system to create a basic interface with > a 4 wire JTAG. The I select Test Connection and this time it seems to be > working. Still more work needed to learn what it is telling be but the two > successes at the bottom of the listing below are encouraging. > > In this mode the supply current is down to 190 mA feeding into the 5V > supply which feeds everything on the board. May be believable. > > Now time to create a proper HalCoGen file. > > > Bob N5BRG > > > [Start: Texas Instruments XDS110 USB Debug Probe] > > Execute the command: > > %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity > > [Result] > > > -----[Print the board config > pathname(s)]------------------------------------ > > /home/bob/.ti/ccs1250/0/0/BrdDat/testBoard.dat > > -----[Print the reset-command software > log-file]----------------------------- > > This utility has selected a 100/110/510 class product. > This utility will load the adapter 'libjioxds110.so'. > The library build date was 'Sep 6 2023'. > The library build time was '09:54:42'. > The library package version is '9.13.0.00201'. > The library component version is '35.35.0.0'. > The controller does not use a programmable FPGA. > The controller has a version number of '5' (0x00000005). > The controller has an insertion length of '0' (0x00000000). > This utility will attempt to reset the controller. > This utility has successfully reset the controller. > Note: This is a key indicator > > -----[Print the reset-command hardware > log-file]----------------------------- > > The scan-path will be reset by toggling the JTAG TRST signal. > The controller is the XDS110 with USB interface. > The link from controller to target is direct (without cable). > The software is configured for XDS110 features. > The controller cannot monitor the value on the EMU[0] pin. > Note: We are not using some of these signals so this is OK. Bob > The controller cannot monitor the value on the EMU[1] pin. > The controller cannot control the timing on output pins. > The controller cannot control the timing on input pins. > The scan-path link-delay has been set to exactly '0' (0x0000). > > -----[Perform the Integrity scan-test on the JTAG > IR]------------------------ > > This test will use blocks of 64 32-bit words. > This test will be applied just once. > > Do a test using 0xFFFFFFFF. > Scan tests: 1, skipped: 0, failed: 0 > Do a test using 0x00000000. > Scan tests: 2, skipped: 0, failed: 0 > Do a test using 0xFE03E0E2. > Scan tests: 3, skipped: 0, failed: 0 > Do a test using 0x01FC1F1D. > Scan tests: 4, skipped: 0, failed: 0 > Do a test using 0x5533CCAA. > Scan tests: 5, skipped: 0, failed: 0 > Do a test using 0xAACC3355. > Scan tests: 6, skipped: 0, failed: 0 > All of the values were scanned correctly. > Note: Good news > > The JTAG IR Integrity scan-test has succeeded. > > -----[Perform the Integrity scan-test on the JTAG > DR]------------------------ > > This test will use blocks of 64 32-bit words. > This test will be applied just once. > > Do a test using 0xFFFFFFFF. > Scan tests: 1, skipped: 0, failed: 0 > Do a test using 0x00000000. > Scan tests: 2, skipped: 0, failed: 0 > Do a test using 0xFE03E0E2. > Scan tests: 3, skipped: 0, failed: 0 > Do a test using 0x01FC1F1D. > Scan tests: 4, skipped: 0, failed: 0 > Do a test using 0x5533CCAA. > Scan tests: 5, skipped: 0, failed: 0 > Do a test using 0xAACC3355. > Scan tests: 6, skipped: 0, failed: 0 > All of the values were scanned correctly. > Note: Good news > > The JTAG DR Integrity scan-test has succeeded. > > -----[An error has occurred and this utility has > aborted]-------------------- > > This error is generated by TI's USCIF driver or utilities. > > The value is '-382' (0xfffffe82). > The title is 'SC_ERR_LIST_SUBPATH_DELETE'. > > The explanation is: > An error occurred when deleting a sub-path from the sub-path select list. > The sub-path may already be off the list. > Thus it cannot be deleted from that list. > > [End: Texas Instruments XDS110 USB Debug Probe] > > [Start: Texas Instruments XDS110 USB Debug Probe_0] > > Execute the command: > > %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity > > [Result] > > > -----[Print the board config > pathname(s)]------------------------------------ > > /home/bob/.ti/ccs1250/0/0/BrdDat/testBoard.dat > > -----[Print the reset-command software > log-file]----------------------------- > > This utility has selected a 100/110/510 class product. > This utility will load the adapter 'libjioxds110.so'. > The library build date was 'Sep 6 2023'. > The library build time was '09:54:42'. > The library package version is '9.13.0.00201'. > The library component version is '35.35.0.0'. > The controller does not use a programmable FPGA. > The controller has a version number of '5' (0x00000005). > The controller has an insertion length of '0' (0x00000000). > This utility will attempt to reset the controller. > This utility has successfully reset the controller. > > -----[Print the reset-command hardware > log-file]----------------------------- > > The scan-path will be reset by toggling the JTAG TRST signal. > The controller is the XDS110 with USB interface. > The link from controller to target is direct (without cable). > The software is configured for XDS110 features. > The controller cannot monitor the value on the EMU[0] pin. > The controller cannot monitor the value on the EMU[1] pin. > The controller cannot control the timing on output pins. > The controller cannot control the timing on input pins. > The scan-path link-delay has been set to exactly '0' (0x0000). > > -----[Perform the Integrity scan-test on the JTAG > IR]------------------------ > > This test will use blocks of 64 32-bit words. > This test will be applied just once. > > Do a test using 0xFFFFFFFF. > Scan tests: 1, skipped: 0, failed: 0 > Do a test using 0x00000000. > Scan tests: 2, skipped: 0, failed: 0 > Do a test using 0xFE03E0E2. > Scan tests: 3, skipped: 0, failed: 0 > Do a test using 0x01FC1F1D. > Scan tests: 4, skipped: 0, failed: 0 > Do a test using 0x5533CCAA. > Scan tests: 5, skipped: 0, failed: 0 > Do a test using 0xAACC3355. > Scan tests: 6, skipped: 0, failed: 0 > All of the values were scanned correctly. > > The JTAG IR Integrity scan-test has succeeded. > > -----[Perform the Integrity scan-test on the JTAG > DR]------------------------ > > This test will use blocks of 64 32-bit words. > This test will be applied just once. > > Do a test using 0xFFFFFFFF. > Scan tests: 1, skipped: 0, failed: 0 > Do a test using 0x00000000. > Scan tests: 2, skipped: 0, failed: 0 > Do a test using 0xFE03E0E2. > Scan tests: 3, skipped: 0, failed: 0 > Do a test using 0x01FC1F1D. > Scan tests: 4, skipped: 0, failed: 0 > Do a test using 0x5533CCAA. > Scan tests: 5, skipped: 0, failed: 0 > Do a test using 0xAACC3355. > Scan tests: 6, skipped: 0, failed: 0 > All of the values were scanned correctly. > > The JTAG DR Integrity scan-test has succeeded. > > [End: Texas Instruments XDS110 USB Debug Probe_0] > > > ----------------------------------------------------------- > > pacsat-dev mailing list -- pacsat-dev(a)amsat.org > View archives of this mailing list at > https://mailman.amsat.org/hyperkitty/list/[email protected] > To unsubscribe send an email to pacsat-dev-leave(a)amsat.org > Manage all of your AMSAT-NA mailing list preferences at > https://mailman.amsat.org >

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Progress
by Bob Stricklin 26 Dec '23

26 Dec '23

All, I have worked on the board a few hours over the past few days. I got the JTAG interface put together and set this up for testing with the PC and a XDS110. When I connected them together and powered things up I initially saw the LEDs on the PCB come on which is what I expect. Unfortunately when I started trying to communicate with using the JTAG I so the LEDs go off and immediatly I checked the 3.3V supply and found it was bouncing up to about 4 volts. Not good. So I powered down and after some thought I decided the 3.3 voltage regulator was not stable enough to support out board. It's working in a feed back mode trying to hold the 3.3V while adjusting Pulse Width Modulation of the LC circuit. I tested the board with an external 3.3V supply and noticed the current draw had increased to about 240 mA. Concerning. I have removed the MAX regulator and put a LDO fixed 3.3V regulator on hanging in the air. #.3V supply now seems solid. I got everything reconnected to JTAG and started again trying to test. When I tried Test Connection I was seeing a message about missing a file which I later realized was the HalCoGen file defining the board info. I then tried the one from the PAcSat project that I had but this was not working either. So I used the setup system to create a basic interface with a 4 wire JTAG. The I select Test Connection and this time it seems to be working. Still more work needed to learn what it is telling be but the two successes at the bottom of the listing below are encouraging. In this mode the supply current is down to 190 mA feeding into the 5V supply which feeds everything on the board. May be believable. Now time to create a proper HalCoGen file. Bob N5BRG [Start: Texas Instruments XDS110 USB Debug Probe] Execute the command: %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity [Result] -----[Print the board config pathname(s)]------------------------------------ /home/bob/.ti/ccs1250/0/0/BrdDat/testBoard.dat -----[Print the reset-command software log-file]----------------------------- This utility has selected a 100/110/510 class product. This utility will load the adapter 'libjioxds110.so'. The library build date was 'Sep 6 2023'. The library build time was '09:54:42'. The library package version is '9.13.0.00201'. The library component version is '35.35.0.0'. The controller does not use a programmable FPGA. The controller has a version number of '5' (0x00000005). The controller has an insertion length of '0' (0x00000000). This utility will attempt to reset the controller. This utility has successfully reset the controller. Note: This is a key indicator -----[Print the reset-command hardware log-file]----------------------------- The scan-path will be reset by toggling the JTAG TRST signal. The controller is the XDS110 with USB interface. The link from controller to target is direct (without cable). The software is configured for XDS110 features. The controller cannot monitor the value on the EMU[0] pin. Note: We are not using some of these signals so this is OK. Bob The controller cannot monitor the value on the EMU[1] pin. The controller cannot control the timing on output pins. The controller cannot control the timing on input pins. The scan-path link-delay has been set to exactly '0' (0x0000). -----[Perform the Integrity scan-test on the JTAG IR]------------------------ This test will use blocks of 64 32-bit words. This test will be applied just once. Do a test using 0xFFFFFFFF. Scan tests: 1, skipped: 0, failed: 0 Do a test using 0x00000000. Scan tests: 2, skipped: 0, failed: 0 Do a test using 0xFE03E0E2. Scan tests: 3, skipped: 0, failed: 0 Do a test using 0x01FC1F1D. Scan tests: 4, skipped: 0, failed: 0 Do a test using 0x5533CCAA. Scan tests: 5, skipped: 0, failed: 0 Do a test using 0xAACC3355. Scan tests: 6, skipped: 0, failed: 0 All of the values were scanned correctly. Note: Good news The JTAG IR Integrity scan-test has succeeded. -----[Perform the Integrity scan-test on the JTAG DR]------------------------ This test will use blocks of 64 32-bit words. This test will be applied just once. Do a test using 0xFFFFFFFF. Scan tests: 1, skipped: 0, failed: 0 Do a test using 0x00000000. Scan tests: 2, skipped: 0, failed: 0 Do a test using 0xFE03E0E2. Scan tests: 3, skipped: 0, failed: 0 Do a test using 0x01FC1F1D. Scan tests: 4, skipped: 0, failed: 0 Do a test using 0x5533CCAA. Scan tests: 5, skipped: 0, failed: 0 Do a test using 0xAACC3355. Scan tests: 6, skipped: 0, failed: 0 All of the values were scanned correctly. Note: Good news The JTAG DR Integrity scan-test has succeeded. -----[An error has occurred and this utility has aborted]-------------------- This error is generated by TI's USCIF driver or utilities. The value is '-382' (0xfffffe82). The title is 'SC_ERR_LIST_SUBPATH_DELETE'. The explanation is: An error occurred when deleting a sub-path from the sub-path select list. The sub-path may already be off the list. Thus it cannot be deleted from that list. [End: Texas Instruments XDS110 USB Debug Probe] [Start: Texas Instruments XDS110 USB Debug Probe_0] Execute the command: %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity [Result] -----[Print the board config pathname(s)]------------------------------------ /home/bob/.ti/ccs1250/0/0/BrdDat/testBoard.dat -----[Print the reset-command software log-file]----------------------------- This utility has selected a 100/110/510 class product. This utility will load the adapter 'libjioxds110.so'. The library build date was 'Sep 6 2023'. The library build time was '09:54:42'. The library package version is '9.13.0.00201'. The library component version is '35.35.0.0'. The controller does not use a programmable FPGA. The controller has a version number of '5' (0x00000005). The controller has an insertion length of '0' (0x00000000). This utility will attempt to reset the controller. This utility has successfully reset the controller. -----[Print the reset-command hardware log-file]----------------------------- The scan-path will be reset by toggling the JTAG TRST signal. The controller is the XDS110 with USB interface. The link from controller to target is direct (without cable). The software is configured for XDS110 features. The controller cannot monitor the value on the EMU[0] pin. The controller cannot monitor the value on the EMU[1] pin. The controller cannot control the timing on output pins. The controller cannot control the timing on input pins. The scan-path link-delay has been set to exactly '0' (0x0000). -----[Perform the Integrity scan-test on the JTAG IR]------------------------ This test will use blocks of 64 32-bit words. This test will be applied just once. Do a test using 0xFFFFFFFF. Scan tests: 1, skipped: 0, failed: 0 Do a test using 0x00000000. Scan tests: 2, skipped: 0, failed: 0 Do a test using 0xFE03E0E2. Scan tests: 3, skipped: 0, failed: 0 Do a test using 0x01FC1F1D. Scan tests: 4, skipped: 0, failed: 0 Do a test using 0x5533CCAA. Scan tests: 5, skipped: 0, failed: 0 Do a test using 0xAACC3355. Scan tests: 6, skipped: 0, failed: 0 All of the values were scanned correctly. The JTAG IR Integrity scan-test has succeeded. -----[Perform the Integrity scan-test on the JTAG DR]------------------------ This test will use blocks of 64 32-bit words. This test will be applied just once. Do a test using 0xFFFFFFFF. Scan tests: 1, skipped: 0, failed: 0 Do a test using 0x00000000. Scan tests: 2, skipped: 0, failed: 0 Do a test using 0xFE03E0E2. Scan tests: 3, skipped: 0, failed: 0 Do a test using 0x01FC1F1D. Scan tests: 4, skipped: 0, failed: 0 Do a test using 0x5533CCAA. Scan tests: 5, skipped: 0, failed: 0 Do a test using 0xAACC3355. Scan tests: 6, skipped: 0, failed: 0 All of the values were scanned correctly. The JTAG DR Integrity scan-test has succeeded. [End: Texas Instruments XDS110 USB Debug Probe_0]

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Expense reimbursement
by Burns Fisher (AMSAT) 21 Dec '23

21 Dec '23

73, Burns Fisher, WB1FJ *AMSAT(R) Engineering -- Flight Software*

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Re: Pacsat dev mtg 12/21/2023
by Corey Minyard 21 Dec '23

21 Dec '23

This is the Thursday night I can't make. Talk to you next time. -corey On Thu, Dec 21, 2023, 14:20 Bill via pacsat-dev <pacsat-dev(a)amsat.org> wrote: > Pacsat dev mtg 12/21/2023 > Thu, Dec 21, 2023 7:00 PM - 9:00 PM (CST) > > Please join my meeting from your computer, tablet or smartphone. > > https://meet.goto.com/990259677 > > You can also dial in using your phone. > (For supported devices, tap a one-touch number below to join instantly.) > > United States: +1 (571) 317-3122 > - One-touch: tel:+15713173122,,990259677# > > Access Code: 990-259-677 > > Join from a video-conferencing room or system. > Dial in or type: 67.217.95.2 or inroomlink.goto.com > Meeting ID: 990 259 677 > Or dial directly: 990259677(a)67.217.95.2 or 67.217.95.2##990259677 > > > Get the app now and be ready when your first meeting starts: > https://meet.goto.com/install > > > > ----------------------------------------------------------- > > pacsat-dev mailing list -- pacsat-dev(a)amsat.org > View archives of this mailing list at > https://mailman.amsat.org/hyperkitty/list/[email protected] > To unsubscribe send an email to pacsat-dev-leave(a)amsat.org > Manage all of your AMSAT-NA mailing list preferences at > https://mailman.amsat.org >

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Pacsat dev mtg 12/21/2023
by Bill 21 Dec '23

21 Dec '23

Pacsat dev mtg 12/21/2023 Thu, Dec 21, 2023 7:00 PM - 9:00 PM (CST) Please join my meeting from your computer, tablet or smartphone. https://meet.goto.com/990259677 You can also dial in using your phone. (For supported devices, tap a one-touch number below to join instantly.) United States: +1 (571) 317-3122 - One-touch: tel:+15713173122,,990259677# Access Code: 990-259-677 Join from a video-conferencing room or system. Dial in or type: 67.217.95.2 or inroomlink.goto.com Meeting ID: 990 259 677 Or dial directly: 990259677(a)67.217.95.2 or 67.217.95.2##990259677 Get the app now and be ready when your first meeting starts: https://meet.goto.com/install

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Re: BringUp Status
by Jim McCullers 20 Dec '23

20 Dec '23

Good progress Bob The memory chips are a pain to hand solder. You should see about 9ma or so on the AX5043s when idle. Jim Update on BringUp…. I tested the power being provided to the AX5043 and did not see any change in current. I will need to investigate this more later. Decided to move on. I started to solder some of the memory chips back on the board and realized I had to use hot air because pads are bottom of package. To do this I need solder paste and I could not find some I once had. Thought I had in in a freezer but was not there. So I have order solder paste due tomorrow. I did solder a replacement CPU chip on the board. After doing this and cleaning I applied power and did not see any issues with power supply voltages. The board now pulls about 90 mA on 5.3V input to main 5V regulator. Started looking at trying to get the TI XDS110 Debug Prob to talk to the JTAG port. No luck communicating yet. Bob N5BRG ----------------------------------------------------------- pacsat-dev mailing list -- pacsat-dev(a)amsat.org View archives of this mailing list at https://mailman.amsat.org/hyperkitty/list/[email protected] To unsubscribe send an email to pacsat-dev-leave(a)amsat.org Manage all of your AMSAT-NA mailing list preferences at https://mailman.amsat.org

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BringUp Status
by Bob Stricklin 20 Dec '23

20 Dec '23

Update on BringUp…. I tested the power being provided to the AX5043 and did not see any change in current. I will need to investigate this more later. Decided to move on. I started to solder some of the memory chips back on the board and realized I had to use hot air because pads are bottom of package. To do this I need solder paste and I could not find some I once had. Thought I had in in a freezer but was not there. So I have order solder paste due tomorrow. I did solder a replacement CPU chip on the board. After doing this and cleaning I applied power and did not see any issues with power supply voltages. The board now pulls about 90 mA on 5.3V input to main 5V regulator. Started looking at trying to get the TI XDS110 Debug Prob to talk to the JTAG port. No luck communicating yet. Bob N5BRG

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Re: Bring-Up Status
by Chris Thompson 20 Dec '23

20 Dec '23

This sounds like great progress Bob, well done. Happy holidays Chris On Tue, Dec 19, 2023 at 10:24 PM Bob Stricklin via pacsat-dev < pacsat-dev(a)amsat.org> wrote: > *Here is an update on my progress checking out the QuadRxOneTx board.….* > > I got the power supply working properly with the chips Zack sent. Took > some time to repair the things I did to debug the issue and get the small > parts soldered on the board. > > When i powered up both supplies were working properly. I did add clamping > Zener diodes across the outputs to provide some modest protection. > > Then I had to reinsert the programming resistors on the current limiting > MAX4995 which I removed to isolate sections of the board. > > When I started testing one of the 3.3V supply sections was not powering up > and the supplies were dropping out in a constant pattern. Found the issue > was the Watch Dog was > not dibbled and this was turning things off and back on in time. Disabled > these. I also found I have the control logic which turns the power on and > off reversed. This is another case of > picking the correct logic on the watch dog chip by using the proper > suffix. The one I specified is AL which I assume is Active Low and I needed > active high. I disowned this and hard wire them > all to be on for now. Will need to work on this more later. The watchdog > chip can also be configured in different ways so all this needs to be > worked when CPU is working. > > With all the board functional (minus the TMS570) still had a short on one > 3.3v section. After some investigation I determine the short was in one or > more memory chip. The > data sheet for these indicated they are particularly sensitive. So I > removed all four of them. After removal and some component testing I found > only one of the four was > Actually shorted. However with these off the board the power supplies were > all functioning properly throughout the board. > > One troubling thing i noticed was with the short on the 3.3V supply if you > jumped by the current limiter which I did to find the issue and removed the > jumper that supply would jump up to about 3.8 volts and take a bunch of > seconds to settle back down to 3.3V. This is a issue with a DC to DC > regulator which is plus width modulated and adjusting to hold the output at > a fixed level. Typically we will not have a short but if a temporary short > were to happen in space the supply could over react and zap some other > parts. Could put the clamping zener on for space use if we can find a good > voltage to use but then these could become a failure point. > > None of the other chips on the board seem to have issues from over voltage > now that the supplies are up and working but will need to test individually > to be sure. The AX5043 have never been turned on yet. > > At this point with no CPU and no memory and the AX5043 all turned off the > board is pulling about 25Ma of current. I should also manually turn the > AX5043s on and check current tomorrow. > > Tomorrow I will solder the three memory chips I took off which are not > shorted back on power up to be sure things are still working. > > Next, I will solder a TMS570 I have on hand and check power and function. > If the board still functions I should be able to talk to the TMS570 via > JTAG and load a program into flash. > > While waiting for the chips from Zach I built up an interface cable to > connect the 10 pin JATAG to the 20 pin DSC100 connector with the correct > pins wired together. This took me about 3 > hours because the wires are so small and working out the details. Due to > this I laid out a PCB to support using two off-the-shelf ribbon cables from > Mouser. I will post the connection info to the GitHub. > I will also order enough ribbon cables to support the four board sets but > need to verify what is needed for each programmer people will be using. > > > > I have about 20 of these on order at JLCPCB which should be in my hands in > about a week +- holidays. > > The board is layer out so one can cut and rejumper if there is an error or > another connection is need for a different programmer. > > *Looking to the future…* > > The boot loader and all initial code will have to run from FLASH. I have > not looked at the current memory map to see if this is the case now. Jim if > your blinky program will run from flash you can send it along. > > Need to review the memory test program and hopefully it also runs from > flash. I will want to test the three of four memory chips to see if they > are working and not damaged from voltage or soldering and removing and > desoldering. I will need to purchase one more MR25H40CDE memory chip to > have a full set again. These chips are in the $28 dollar range from mouser > so I hope the three are working. I am assuming I will be able to solder > them back on the board. I believe I can but I want be reflowing the solder > on the pad initially. If they get hot in use I may try to do this later > with hot air system. > > This is all a typical bring-up process for a board this complex. It looks > like if we put replacement voltage regulators on the other boards and tune > the logic on the watch dog or replace the current control devices ($5 each) > which would be easy to do the other three boards should come up working. > > i have also ordered 12 more of the voltage regulators from China which I > hope will be working and equivalent. Should have those in a week also. > > Lots more to test and checkout but if the TMS570 will work it should go > faster. > > Bob N5BRG > > > > > ----------------------------------------------------------- > > pacsat-dev mailing list -- pacsat-dev(a)amsat.org > View archives of this mailing list at > https://mailman.amsat.org/hyperkitty/list/[email protected] > To unsubscribe send an email to pacsat-dev-leave(a)amsat.org > Manage all of your AMSAT-NA mailing list preferences at > https://mailman.amsat.org > -- Chris E. Thompson chrisethompson(a)gmail.com g0kla(a)arrl.net

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