[pacsat-dev] Pacsat memory considerations

We need to address Pacsat memory considerations.

The MR25H40 is arranged as 8 x 512k bytes and is SPI.

The higher capacity models are parallel interface that would significantly complicate the design and board space.

In addition, they operate at much higher power consumption than the MR25H40.

With multiple MR25H40s there will de design issues with the file system when crossing memory bounds.

Burns or Rich, do you know what speed you are clocking the MR25H40?

There is considerable difference in power consumption between clocking speeds of 1mhz and 40mhz.

Thanks

Jim McCullers

WA4CWI